The present inventions is related to systems and methods for data processing.
Various data processing circuits have been developed that include data detector and data decoder circuits. In a typical operation, a data detector circuit receives a data input and attempts to assign binary values corresponding to an original data input. In addition to assigning binary values, the data detector circuit assigns soft values indicating a degree of confidence that a data detection algorithm implemented by the data detector circuit has in the particular assigned binary value. Both the binary values and the corresponding soft values are provided to a downstream data decoder circuit where they are used to perform error correction in an attempt to recover originally written data. In some cases, stubborn patterns may be introduced to the data detector circuit where the soft value for a given binary value indicates a high degree of confidence even though the binary value has been incorrectly assigned. In some cases, remaining errors are not correctable due to the improperly indicated binary value and assigned binary value.
Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for data processing.